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There are 13 papers published in subject: > since this site started. |
Results per page: | 13 Total, 2 Pages | << First < Previous 1 2 |
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1. ACO-Steiner: Ant Colony Optimization Based Efficient Rectilinear Steiner Minimal Tree Construction | |||
Yu Hu,Tong Jing,Xianlong Hong,Zhe Feng,Xiaodong Hu,Guiying Yan | |||
Computer Science and Technology 31 January 2005 | |||
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Abstract:he rectilinear Steiner minimal tree (RSMT) problem is one of the fundamental problems in physical design, especially in routing, which is known to be NP-complete. This paper presents an algorithm, called ACO-Steiner, for RSMT construction based on ant colony optimization (ACO). We construct a RSMT with ants’ movements in Hanan grid, and then we break the constraint of Hanan grid to accelerate ants’ movements to improve the performance of the algorithm. This algorithm has been implemented on a Sun workstation with Unix operating system and the results have been compared with the fastest exact RSMT algorithm, Geo-Steiner 3.1 and a recent heuristic using batched greedy triple construction (BGTC). Experimental results show that ACO-Steiner can get a short running time and keep the high performance. Furthermore, we also find that our ACO-Steiner is easily extended to be used into some other problems, such as rectilinear Steiner minimal tree avoiding obstacles, and congestion reduction in g | |||
TO cite this article:Yu Hu,Tong Jing,Xianlong Hong, et al. ACO-Steiner: Ant Colony Optimization Based Efficient Rectilinear Steiner Minimal Tree Construction[OL].[31 January 2005] http://en.paper.edu.cn/en_releasepaper/content/1517 |
2. Obstacle-Avoiding Rectilinear Minimum-Delay Steiner Tree Construction towards IP-Block-Based SOC Design | |||
Jingyu Xu | |||
Computer Science and Technology 07 January 2005 | |||
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Abstract:With System-on-a-Chip design, IP blocks form routing obstacles that deteriorate global interconnect delay. In this paper, we present a new approach for obstacle-avoiding rectilinear minimal delay Steiner tree (OARMDST) construction. We formalize the solving of minimum delay tree through the concept of an extended minimization function, and trade the objective into a top-down recursion, which wisely produces delay minimization from source to critical sinks. We analyze the topology generation with treatment of obstacles and exploit the connection flexibilities. To our knowledge, this is the first in-depth study of OARMDST problem based on topological construction. Experimental results are given to demonstrate the efficiency of the algorithm. | |||
TO cite this article:Jingyu Xu. Obstacle-Avoiding Rectilinear Minimum-Delay Steiner Tree Construction towards IP-Block-Based SOC Design[OL].[ 7 January 2005] http://en.paper.edu.cn/en_releasepaper/content/1436 |
3. Timing-Driven Global Routing with Efficient Buffer Insertion | |||
Jingyu Xu | |||
Computer Science and Technology 07 January 2005 | |||
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Abstract:Timing optimization is an important goal of global routing in deep submicron era. To guarantee the timing performance of the circuit, merely adopting topology optimization becomes inadequate. In this paper, we present an efficient timing-driven global routing algorithm with buffer insertion. Our approach is capable of applying topological-based timing optimization and buffer insertion simultaneously with routability considerations. Compared with previous works, we efficiently solve the timing issues under a limited buffer usage. The experimental results have demonstrated significant delay improvement within short runtime with very small number of buffers inserted. | |||
TO cite this article:Jingyu Xu. Timing-Driven Global Routing with Efficient Buffer Insertion[OL].[ 7 January 2005] http://en.paper.edu.cn/en_releasepaper/content/1432 |
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