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| The emergence of hardware construction languages (HCLs), such as PyRTL, PyHDL, and PyMTL, for microprocessor RTL design in agile hardware design methodology brings new challenges to design verification. However, most of the existing dynamic verification techniques for microprocessor RTL designs in HCLs are lacking sufficient consideration of constraints of valid instructions in a given instruction-set architecture (ISA). In contrast, such constraints are pervasive in microprocessor RTL design. This may degrade coverage achievements and the efficiency of the verification process.
In this paper, we propose to enhance the coverage-directed dynamic verification method for microprocessor RTL design in several aspects. First, we combine grammar-based fuzz testing and symbolic simulation to generate test instructions for improving coverage. Second, we propose to employ a grammar-based fuzz testing technique by exploiting constraints of valid ISA instructions of a microprocessor under verification. Finally, we implement all the enhancements in a test generation tool, named MPFuzz, for testing microprocessor RTL designs in PyRTL. Experimental results show that MPFuzz can efficiently generate test instructions for microprocessor RTL designs in PyRTL. The test instructions generated by MPFuzz can achieve higher coverage at least four times than that by the state-of-the-art fuzzing-based RTL test generation tool. |
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| Keywords:domain software Engineering, grammar-based fuzzing, symbolic simulation, test generation |
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