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Tabu Search for Floorplan Using B*-tree Representation
mao fubing * #,Xu Ning
School of Computer Science and Technology, Wuhan University of Technology
*Correspondence author
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Subject:
Funding: 国家自然科学基金（No.60572015）
Opened online:12 December 2008
Accepted by: none
Citation: mao fubing,Xu Ning.Tabu Search for Floorplan Using B*-tree Representation[OL]. [12 December 2008] http://en.paper.edu.cn/en_releasepaper/content/26569
 
 
Floorplan is an very important step in the physical design of VLSI circuits. It is the rectangular packing problem: Given a set of rectangular modules, place them non-overlapping on a plane within a rectangle of minimum area. Since the variety of packing is uncountable infinite, the key issue is to find the optimal solution in the finite solution space. It is hard to be solved exactly in practical applications. An approach is presented to improve the area utilization based on B*-tree. The simulated annealing is embedded into the tabu search for floorplan. Experimental results show that our approach can improve the area utilization in short time.
Keywords:VLSI; Tabu Search(TS);Simulated Annealing(SA);B*-tree
 
 
 

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