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Sponsored by the Center for Science and Technology Development of the Ministry of Education
Supervised by Ministry of Education of the People's Republic of China
In this paper, a new physical model for sub-nH spiral inductors in CMOS integrated circuits (IC) design is developed. Based on physical analysis of on-chip inductors' high frequency effects, П topology with RLC elements is adopted to capture the lumped characteristics of on-chip sub-nH spiral inductor. The interconnects between inductors and other devices are incorporated into the proposed model, which simplifies the circuit and layout design. The new model demonstrates a good agreement with measured S-parameter within 40GHz through analytical calculation and data fitting. Finally, the proposed inductor model is employed in a 20-GHz 4.8dB-NF low noise amplifier (LNA) design for accurate circuit simulation.